UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 836

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UPD78F1203MC-CAB-AX

Manufacturer Part Number
UPD78F1203MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1203MC-CAB-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
RENESAS
Quantity:
15 000
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
NEC
Quantity:
20 000
834
(1) Start condition ~ address
INTIICA
INTIICA
Processing by master device
Transfer lines
Processing by slave device
WREL
WREL
ACKD
MSTS
ACKD
MSTS
ACKE
ACKE
WTIM
SDA0
WTIM
SCL0
Notes 1. To cancel master wait, write “FFH” to IICA or set WREL.
SPD
TRC
SPD
TRC
IICA
STD
SPT
IICA
STD
SPT
STT
STT
2. Write data to IICA, not setting WREL, in order to cancel a wait state during slave transmission.
H
H
H
(When 8-Clock Wait Is Selected for Master, 9-Clock Wait Is Selected for Slave) (1/3)
L
L
L
L
L
L
IICA
AD6 AD5 AD4 AD3 AD2 AD1 AD0
1
Figure 14-33. Example of Slave to Master Communication
2
address
Receive
Transmit
3
4
CHAPTER 14 SERIAL INTERFACE IICA
5
User’s Manual U19678EJ1V1UD
6
7
R
8
ACK
9
IICA
IICA
D7
Note 1
Receive
1
Transmit
data
D6
FFH Note 1
2
Note 2
D5
3
D4
4
D3
5
D2
6

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