UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 372

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UPD78F1203MC-CAB-AX

Manufacturer Part Number
UPD78F1203MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1203MC-CAB-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
RENESAS
Quantity:
15 000
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
NEC
Quantity:
20 000
370
(13) Timer triangle wave output mode register 0 (TOT0)
Address: F01E8H, F01E9H
Symbol
TOT0
TOT0 controls the timer output mode of the slave channel that is set by setting TOMm of the TOM0 register to
1.
The setting of each channel m specified by using this register is applied when TREm and TMEm are set to 0
or TREm and TMEm are set to 1, when timer output is enabled (TOEm = 1) and TOMm is set to 1.
TOT0 can be rewritten when timer operation is stopped (TEm = 0).
TOT0 can be set by a 16-bit memory manipulation instruction.
Reset signal generation clears this register to 0000H.
Note Set the slave channel to TOTm = 1 when triangle wave PWM has been generated.
Caution Be sure to clear bits 15 to 12 to 0.
Remark n: Master channel number, m: Slave channel number
TOT
15
m
0
0
1
Figure 7-4. Format of Timer Triangle Wave Output Mode Register 0 (TOT0)
Sets by a master channel timer interrupt request signal (INTTMn) and resets by a slave channel
timer interrupt request signal (INTTMm).
Sets by a timer interrupt request signal during a down status (INTTMm) and resets by a timer
interrupt request signal during an up status (INTTMm)
14
0
n = 00, 02, 04, 06, 08
n < m ≤ 11
13
0
After reset: 0000H
CHAPTER 7 INVERTER CONTROL FUNCTIONS
12
0
TOT
11
11
Selection of slave channel output mode of channel m
User’s Manual U19678EJ1V1UD
TOT
10
10
R/W
TOT
09
9
TOT
08
8
TOT
07
7
Note
TOT
06
.
6
TOT
05
5
TOT
04
4
TOT
03
3
TOT
02
2
TOT
01
1
TOT
00
0

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