UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 341
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UPD78F1203MC-CAB-AX
Manufacturer Part Number
UPD78F1203MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1203MC-CAB-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
RENESAS
Quantity:
15 000
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
NEC
Quantity:
20 000
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6.8 Simultaneous Channel Operation Function of Timer Array Unit TAUS
6.8.1 Operation as one-shot pulse output function
input to the TIn pin.
starts operating when a start trigger is detected, and loads the value of TDRn. TCRn counts down from the value of
TDRn it has loaded, in synchronization with the count clock. When TCRn = 0000H, it outputs INTTMn and stops
counting until the next start trigger is detected.
operation using INTTMn of the master channel as a start trigger, and loads the value of TDRm. TCRm counts down
from the value of TDRm it has loaded, in synchronization with the count value. When the count value = 0000H, it
outputs INTTMm and stops counting until the next start trigger (INTTMn of the master channel) is detected. The
output level of TOm becomes active one count clock after generation of INTTMn from the master channel, and
inactive when TCRm = 0000H.
start trigger.
By using two channels as a set, a one-shot pulse having any delay pulse width can be generated from the signal
The delay time and pulse width can be calculated by the following expressions.
The master channel operates in the one-count mode and counts the pulse delay time. TCRn of the master channel
The slave channel operates in the one-count mode and counts the pulse width. TCRm of the slave channel starts
Instead of using the TIn pin input, a one-shot pulse can also be output using the software operation (TSn = 1) as a
Caution The timing of loading of TDRn of the master channel is different from that of TDRm of the slave
Remark
Delay time = {Set value of TDRn (master) + 2} × Count clock period
Pulse width = {Set value of TDRm (slave)} × Count clock period
channel. If TDRn and TDRm are rewritten during operation, therefore, an illegal waveform is
output. Rewrite the TDRn register after INTTMn is generated and the TDRm register after INTTMm
is generated.
n = 00, 02, 04, 06, 08, 10 (78K0R/IB3: n = 02, 04, 06 and 10)
m = n + 1
CHAPTER 6 TIMER ARRAY UNIT TAUS
User’s Manual U19678EJ1V1UD
339
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