MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 110

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MC68376BGMAB20

Manufacturer Part Number
MC68376BGMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BGMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BGMAB20
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
External breakpoint circuitry decodes the function code and address lines, places an
instruction word on the data bus, and asserts BERR. The CPU32 then performs hard-
ware breakpoint exception processing: it acquires the number of the hardware break-
point exception vector, computes the vector address from this number, loads the
content of the vector address into the PC, and jumps to the exception handler routine
at that address. If the external device asserts DSACK rather than BERR, the CPU32
ignores the breakpoint and continues processing.
When BKPT assertion is synchronized with an instruction prefetch, processing of the
breakpoint exception occurs at the end of that instruction. The prefetched instruction
is “tagged” with the breakpoint when it enters the instruction pipeline. The breakpoint
exception occurs after the instruction executes. If the pipeline is flushed before the
tagged instruction is executed, no breakpoint occurs. When BKPT assertion is syn-
chronized with an operand fetch, exception processing occurs at the end of the instruc-
tion during which BKPT is latched.
Refer to the CPU32 Reference Manual (CPU32RM/AD) and the SIM Reference Man-
ual (SIMRM/AD) for additional information. Breakpoint operation flow for the CPU32 is
shown in Figure 5-13.
MOTOROLA
SYSTEM INTEGRATION MODULE
MC68336/376
5-32
USER’S MANUAL

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