MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 355

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MC68376BGMAB20

Manufacturer Part Number
MC68376BGMAB20
Description
IC MCU 32BIT 8K ROM 160-QFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68376BGMAB20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
CAN, EBI/EMI, SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Ram Size
7.5K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
160-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68376BGMAB20
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
CCW[0:27] — Conversion Command Word Table
D.5.8 Conversion Command Word Table
P — Pause
BYP — Sample Amplifier Bypass
IST[1:0] — Input Sample Time
CHAN[5:0] — Channel Number
MC68336/376
USER’S MANUAL
RESET:
15
The pause bit allows the creation of sub-queues within queue 1 and queue 2. The
QADC performs the conversion specified by the CCW with the pause bit set, and then
the queue enters the pause state. Another trigger event causes execution to continue
from the pause to the next CCW.
Setting BYP enables the amplifier bypass mode for a conversion, and subsequently
changes the timing. Refer to 8.11.1.1 Amplifier Bypass Mode Conversion Timing
for more information.
The IST field specifies the length of the sample window. Longer sample times permit
more accurate A/D conversions of signals with higher source impedances.
Table D-28 shows the bit encoding of the IST field.
The CHAN field selects the input channel number corresponding to the analog input
pin to be sampled and converted. The analog input pin channel number assignments
and the pin definitions vary depending on whether the QADC is operating in multi-
plexed or non-multiplexed mode. The queue scan mechanism sees no distinction be-
tween an internally or externally multiplexed analog input.
CHAN specifies a reserved channel number (channels 32 to 47) or an invalid channel
number (channels 4 to 31 in non-multiplexed mode), the low reference level (V
converted. Programming the channel field to channel 63 indicates the end of the
queue. Channels 60 to 62 are special internal channels. When one of these channels
is selected, the sample amplifier is not used. The value of V
placed directly onto the converter. Programming the input sample time to any value
other than two for one of the internal channels has no benefit except to lengthen the
overall conversion time.
0 = Do not enter the pause state after execution of the current CCW.
1 = Enter the pause state after execution of the current CCW.
0 = Amplifier bypass mode disabled.
1 = Amplifier bypass mode enabled.
14
13
NOT USED
12
IST[1:0]
11
00
01
10
11
Table D-28 Input Sample Times
10
REGISTER SUMMARY
U
9
P
BYP
U
8
Input Sample Times
16 QCLK periods
2 QCLK periods
4 QCLK periods
8 QCLK periods
U
7
IST[1:0]
6
U
U
5
U
4
RL
$YFF230–$YFF27E
, V
U
3
CHAN[5:0]
RH
U
, or V
2
MOTOROLA
U
1
DDA
RL
/2 is
D-37
U
) is
0

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