MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 284

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

A-8
MOTOROLA
Num
27A
29A
30A
39A
46A
47A
47B
26
27
28
29
30
31
33
35
37
39
46
48
53
54
55
56
57
70
71
72
73
74
75
Data Out Valid to DS, CS Asserted (Write)
Data In Valid to Clock Low (Data Setup)
Late BERR, HALT Asserted to Clock Low (Setup Time)
AS, DS Negated to DSACK[1:0], BERR, HALT, AVEC Negated
DS, CS Negated to Data In Invalid (Data In Hold)
DS, CS Negated to Data In High Impedance
CLKOUT Low to Data In Invalid (Fast Cycle Hold)
CLKOUT Low to Data In High Impedance
DSACK[1:0] Asserted to Data In Valid
Clock Low to BG Asserted/Negated
BR Asserted to BG Asserted (RMC Not Asserted)
BGACK Asserted to BG Negated
BG Width Negated
BG Width Asserted
R/W Width Asserted (Write or Read)
R/W Width Asserted (Fast Write or Read Cycle)
Asynchronous Input Setup Time
Asynchronous Input Hold Time
DSACK[1:0] Asserted to BERR, HALT Asserted
Data Out Hold from Clock High
Clock High to Data Out High Impedance
R/W Asserted to Data Bus Impedance Change
RESET Pulse Width (Reset Instruction)
BERR Negated to HALT Negated (Rerun)
Clock Low to Data Bus Driven (Show)
Data Setup Time to Clock Low (Show)
Data Hold from Clock Low (Show)
BKPT Input Setup Time
BKPT Input Hold Time
Mode Select Setup Time
BR, BGACK, DSACK[1:0], BERR, AVEC, HALT
(V
DD
and V
Table A-6 AC Timing (Continued)
DDSYN
ELECTRICAL CHARACTERISTICS
Characteristic
= 5.0 Vdc 5%, V
10
5
8
8
,
9
12
8
8
11
SS
= 0 Vdc, T
A
= T
L
to T
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BRAGA
t
SCLDD
SCLDH
t
t
CLBAN
SCLDS
t
BELCL
t
t
t
t
t
RWAS
t
t
HRPW
SNDN
GAGN
DOCH
CHDH
RADC
BNHN
t
DVSA
CLDH
DABA
BKHT
BKST
DICL
SNDI
SHDI
CLDI
DADI
t
RWA
AIHT
t
AIST
MSS
GH
GA
H
)
1
USER’S MANUAL
Min
115
512
10
15
10
70
12
32
10
10
10
10
20
—
—
—
—
—
—
5
0
0
1
1
2
1
5
0
0
0
MC68336/376
Max
60
48
72
46
23
30
23
23
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
Unit
t
t
t
t
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
cyc
cyc
cyc
cyc
cyc
cyc