MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 167

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

MC68336/376
USER’S MANUAL
Baud rate is selected by writing a value from 2 to 255 into SPBR[7:0] in SPCR0. The
QSPI uses a modulus counter to derive SCK baud rate from the MCU system clock.
The following expressions apply to SCK baud rate:
Giving SPBR[7:0] a value of zero or one disables the baud rate generator. SCK is dis-
abled and assumes its inactive state value.
The DSCK bit in each command RAM byte inserts either a standard or user-specified
delay from chip-select assertion until the leading edge of the serial clock. The DSCKL
field in SPCR1 determines the length of the user-defined delay before the assertion of
SCK. The following expression determines the actual delay before SCK:
where DSCKL[6:0] equals {1,2,3,..., 127}.
When DSCK equals zero, DSCKL[6:0] is not used. Instead, the PCS valid-to-SCK
transition is one-half the SCK period.
There are two transfer length options. The user can choose a default value of eight
bits, or a programmed value of eight to sixteen bits, inclusive. The programmed value
must be written into BITS[3:0] in SPCR0. The BITSE bit in each command RAM byte
determines whether the default value (BITSE = 0) or the BITS value (BITSE = 1) is
used. Table 9-3 shows BITS[3:0] encoding.
SPBR[7:0]
PCS to SCK Delay
Table 9-3 Bits Per Transfer
SCK Baud Rate
BITS[3:0]
QUEUED SERIAL MODULE
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
=
------------------------------------------------------------------------- -
2 SCK Baud Rate Desired
Bits per Transfer
or
=
System Clock
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
=
------------------------------------ -
2 SPBR[7:0]
System Clock
16
10
11
12
13
14
15
8
9
----------------------------------- -
System Clock
DSCKL[6:0]
MOTOROLA
9-17