MC68376BGMAB20 Freescale Semiconductor, MC68376BGMAB20 Datasheet - Page 144

• Manufacturer Part Number: MC68376BGMAB20
• Description: IC MCU 32BIT 8K ROM 160-QFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68376BGMAB20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Ram Size: 7.5K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 160-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

6.4 Normal Access
6.5 Standby and Low-Power Stop Operation
6-2
MOTOROLA
Table 6-1 shows RASP[1:0] field encodings.
Refer to 4.5 Addressing Modes for more information on addressing modes. Refer to
5.5.1.7 Function Codes for more information concerning address space types and
program/data space access.
The array can be accessed by byte, word, or long word. A byte or aligned word access
takes one bus cycle or two system clocks. A long word access requires two bus cycles.
Misaligned accesses are not permitted by the CPU32 and will result in an address
error exception. Refer to 5.6 Bus Operation for more information concerning access
times.
Standby and low-power modes should not be confused. Standby mode maintains the
RAM array when the main MCU power supply is turned off. Low-power stop mode al-
lows the central processor unit to control MCU power consumption.
Relative voltage levels of the MCU V
is in standby mode. SRAM circuitry switches to the standby power source when V
drops below specified limits. If specified standby supply voltage levels are maintained
during the transition, there is no loss of memory when switching occurs. The RAM
array cannot be accessed while the SRAM module is powered from V
operation is not desired, connect the V
I
PENDIX A ELECTRICAL CHARACTERISTICS for standby switching and power con-
sumption specifications.
Setting the STOP bit in RAMMCR switches the SRAM module to low-power stop
mode. In low-power stop mode, the array retains its contents, but cannot be read or
written by the CPU32. STOP can be written only when the CPU32 is operating in
supervisor mode.
The SRAM module will switch to standby mode while it is in low-power stop mode,
provided the operating constraints discussed above are met.
SB
(SRAM standby current) values may vary while V
Table 6-1 SRAM Array Address Space Type
RASP[1:0]
00
01
10
11
STANDBY RAM MODULE
DD
Unrestricted program and data
Supervisor program and data
STBY
and V
Unrestricted program
Supervisor program
pin to V
STBY
Space
pins determine whether the SRAM
SS
DD
.
transitions occur. Refer to AP-
STBY
USER’S MANUAL
MC68336/376
. If standby
DD