IP-CPRI Altera, IP-CPRI Datasheet - Page 111

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

Chapter 6: Software Interface
MAP Interface and AUX Interface Configuration Registers
Table 6–33. CPRI_MAP_TBL_RX—Advanced Mapping Rx Configuration Table—Offset: 0x110
Table 6–34. CPRI_MAP_TBL_TX—Advanced Mapping Tx Configuration Table—Offset: 0x114
Table 6–35. CPRI_MAP_OFFSET_RX—MAP Rx Frame Offset—Offset: 0x118
Table 6–36. CPRI_MAP_OFFSET_TX—MAP Tx Frame Offset—Offset: 0x11C (Part 1 of 2)
December 2010 Altera Corporation
RSRV
position [20:16]
RSRV
ac
RSRV
enable
Note to
(1) Currently configurable entry in the advanced mapping Rx table. This register applies only to map_mode 01 or 10, the advanced mapping modes.
RSRV
position
RSRV
ac
RSRV
enable
Note to
(1) Currently configurable entry in the advanced mapping Tx table. This register applies only to map_mode 01 or 10, the advanced mapping modes.
RSRV
map_rx_hf_resync
map_rx_offset_z
map_rx_offset_x
RSRV
map_tx_hf_resync
Field
Field
Table
Table
Field
Field
6–33:
6–34:
[31:21]
[15:WIDTH_N_MAP+8]
[WIDTH_N_MAP +7:8]
[7:1]
[0]
[31:21]
[20:16]
[15:WIDTH_N_MAP+8] UR0
[WIDTH_N_MAP +7:8]
[7:1]
[0]
Bits
Bits
[31:17] UR0
[16]
[15:8]
[7:0]
[31:17] UR0
[16]
Bits
Bits
RW
RW
RW
RW
Access
Access
UR0
RW
UR0
RW
UR0
RW
UR0
RW
RW
UR0
RW
Access
Access
Reserved.
Enables synchronization every hyperframe instead of every radio
frame. When asserted, the map_rx_offset_z field is ignored.
Hyperframe number for start of CPRI MAP receiver AxC container
block write to each enabled mapN Rx buffer.
Basic frame number for start of CPRI MAP receiver AxC container
block write to each enabled mapN Rx buffer.
Reserved.
Enables synchronization every hyperframe instead of every radio
frame. When asserted, the map_tx_offset_z field is ignored.
Reserved.
Starting bit position of IQ sample in timeslot.
Reserved.
AxC interface number.
Reserved.
Enable mapping of IQ sample into timeslot.
Reserved.
Starting bit position of IQ sample in timeslot.
Reserved.
AxC interface number.
Reserved.
Enable mapping of IQ sample into timeslot.
Function
Function
Function
Function
CPRI MegaCore Function User Guide
(Note 1)
(Note 1)
11’h0
5'h0
0
0
7'h0
1'h0
11’h0
5'h0
0
0
7'h0
1'h0
Default
Default
Default
15'h0
1’h0
8’h0
8’h0
Default
15'h0
1’h0
6–15