IP-CPRI Altera, IP-CPRI Datasheet - Page 128

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

7–4
Figure 7–5. CPRI MegaCore Function Cyclone IV GX Auto-rate Negotiation Demonstration Testbench
(tb_altera_cpri_c4gx_autorate.vhd)
Test Sequence
CPRI MegaCore Function User Guide
The testbench starts by resetting the CPRI MegaCore function.
frequencies of the clock inputs to the MegaCore function.
Table 7–2. Clock Frequencies for CPRI MegaCore Function Under Test
After coming out of the reset state, the MegaCore function starts the frame
synchronization process to detect the presence of a partner and establish frame
synchronization.
The tb_altera_cpri, tb_altera_cpri_mii, and tb_altera_cpri_mii_noiq testbenches
then perform the following actions:
■
■
tb_altera_cpri_c4gx_autorate
Clock
gxb_refclk
cpu_clk
clk_ex_delay
mapN_tx_clk
Sends a predetermined data sequence to the AUX interface, and checks that the
data appears on the outgoing AUX interface after loopback through the CPRI link.
Generates a sequence of 32-bit words and sends the data sequence to each
antenna-carrier interface that is enabled. The tb_altera_cpri and
tb_altera_cpri_mii testbenches support three antenna-carrier interfaces; the
tb_altera_cpri_autorate, tb_altera_cpri_c4gx_autorate, and
tb_altera_cpri_mii_noiq testbenches support no antenna-carrier interfaces.
Each testbench with antenna-carrier interfaces enabled then checks that the data
sent to the mapN interfaces appears on the outgoing antenna-carrier interface data
channels, after loopback through the CPRI link.
Altera
Testbench
Reference Clock
altgx_reconfig
altpll_reconfig
cpri_clkout
Frequency
61.44 MHz
30.72 MHz
30.96 MHz
3.84 MHz
ROM_1288M
ROM_614M
CPU Interface
gxb_txdataout
gxb_rxdatain
txdataout
CPRI
DUT
rxdatain
CPRI
Link
Avalon-MM
Interface
December 2010 Altera Corporation
Table 7–2
Chapter 7: Testbenches
lists the
Test Sequence