IP-CPRI Altera, IP-CPRI Datasheet - Page 62

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

4–38
CPRI MegaCore Function User Guide
The incoming data on the AUX interface must match the output frame
synchronization information with a delay of exactly two cpri_clkout clock cycles.
Figure 4–18
Figure 4–18. Incoming AUX Link Synchronization
Note to
(1) The cpri_tx_aux_data and cpri_tx_aux_mask signals are fields in the aux_tx_mask_data input bus. Refer to
The AUX interface transmitter module derives the frame synchronization information
from the CPRI transmitter frame synchronization state machine. It provides the
following data and synchronization lines on the AUX interface to enable the required
precise frame timing:
■
■
■
■
■
■
■
■
For information about the relationships between the synchronization pulses and
numbers, refer to
AUX interface and the CPRI link, refer to
cpri_tx_aux_mask
cpri_tx_aux_data
cpri_tx_start—Asserted for the duration of the first basic frame following the
offset defined in the CPRI_START_OFFSET_TX register
cpri_tx_rfp and cpri_tx_hfp—Synchronization pulses for start of 10 ms radio
frame and start of hyperframe
cpri_tx_bfn and cpri_tx_hfn—Current radio frame and hyperframe numbers
cpri_tx_x—Index number of the current basic frame in the current hyperframe
cpri_tx_seq—Index number of the current 32-bit word in the current basic frame
cpri_tx_aux_data—Incoming data port for data on the AUX link
cpri_tx_aux_mask—Incoming bit mask for AUX link data that indicates bits that
must be transmitted without changes to the CPRI link
The CPRI MegaCore function Layer 1 uses the cpri_tx_aux_mask to select the
enabled bit values in the control transmit table. You must deassert all the mask bits
during K28.5 character insertion in the outgoing CPRI frame (which occurs when
Z=X=0). Otherwise, the MegaCore function asserts an error signal cpri_tx_error
on the following cpri_clkout clock cycle to indicate that the K28.5 character
expected by the CPRI link protocol has been overwritten.
cpri_tx_sync_rfp—Synchronization input used in REC master to control the start
of a new 10 ms radio frame
Table 5–13 on page
cpri_tx_seq
Figure
4–18:
shows the expected timing on the incoming AUX connection.
(1)
(1)
Figure 4–16 on page
5–12.
2 cpri_clkout cycles
0
1
Basic Radio Frame
2
0
4–35. For the mapping of data between the
Figure 4–17 on page
1
2
num_seq-1
December 2010 Altera Corporation
Chapter 4: Functional Description
4–35.
2 cpri_clkout cycles
Auxiliary Interfaces
num_seq-1