IP-CPRI Altera, IP-CPRI Datasheet - Page 97

• Manufacturer Part Number: IP-CPRI
• Description: IP CORE - Common Public Radio Interface (CPRI)
• Manufacturer: Altera

Specifications of IP-CPRI

• Software Application: IP CORE, Interface And Protocols, HIGH SPEED
• Supported Families: Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na
• Lead Free Status / RoHS Status: na

December 2010 Altera Corporation
1
The CPRI MegaCore function supports the following sets of registers that control the
CPRI MegaCore function or query its status:
■
■
■
■
All of the registers are 32 bits wide and their addresses are shown as hexadecimal
values. The registers can be accessed only on a 32-bit (4-byte) basis. The addressing for
the registers therefore increments by units of 4.
Reserved fields are labelled in the register tables. These fields are reserved for future
use and your design should not write to or rely on a specific value being found in any
reserved field or bit.
A remote device can access these registers only by issuing read and write operations
through the CPU interface.
Table 6–1
Table 6–1. Register Access Codes
Table 6–2
Table 6–2. CPRI MegaCore Function Register Address Ranges
RC
RO
RW
UR0
WO
Address Range
0x00–0x4C
0x50–0xF0
0xF4–0x1FC
0x200–0x24C
0x250–0x2FC
0x300–0x334
CPRI Interface Registers
MAP Interface and AUX Interface Configuration Registers
Ethernet Registers
HDLC Registers
Code
lists the access codes used to describe the type of register bits.
lists the CPRI MegaCore function register address ranges.
Read to clear
Read-only
Read/write
Unused bits/read as 0
Write-only; read as 0
Interface
CPRI Interface Registers
MAP Interface and AUX Interface Configuration Registers
Reserved
Ethernet Registers
Reserved
HDLC Registers
Description
6. Software Interface
CPRI MegaCore Function User Guide