IP-CPRI Altera, IP-CPRI Datasheet - Page 137
IP-CPRI
Manufacturer Part Number
IP-CPRI
Description
IP CORE - Common Public Radio Interface (CPRI)
Manufacturer
Altera
Specifications of IP-CPRI
Software Application
IP CORE, Interface And Protocols, HIGH SPEED
Supported Families
Arria II GX, Cyclone IV GX, HardCopy IV, Stratix IV
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
na
Lead Free Status / RoHS Status
na
- Current page: 137 of 142
- Download datasheet (3Mb)
Design Implementation
December 2010 Altera Corporation
f
The CPRI MegaCore function supports auto-rate negotiation. This feature allows you
to specify that the CPRI MegaCore function should determine the CPRI line rate at
startup dynamically, by stepping down to successively slower line rates if the
low-level receiver cannot achieve frame synchronization with the current line rate.
You can provide input to the low-level CPRI interface receiver to implement this
capability in your design, with the help of logic connected outside the MegaCore
function.
This appendix describes the steps you must follow and the external logic you must
include in your design to implement CPRI line rate auto-negotiation.
To use the auto-rate negotiation feature, in the ALTGX parameter editor, you must
perform the following actions:
■
■
■
■
In Cyclone IV GX devices, auto-rate negotiation is implemented by performing
scan-chain based PLL reconfiguration of the MPLL associated with the relevant
transceiver channel. Designs that target a Cyclone IV GX device therefore require an
ALTPLL_RECONFIG megafunction to perform PLL reconfiguration of the MPLL.
For information about the Cyclone IV GX transceiver blocks and MPLLs, refer to the
Transceivers
ALTPLL_RECONFIG megafunction, refer to the
(ALTPLL_RECONFIG) Megafunction User
In the CPRI parameter editor, enable auto-rate negotiation.
In the CPRI parameter editor, set the transceiver to run at the highest CPRI line
rate for this device.
Include additional external data and logic in your design, such as input data to the
ALTGX_RECONFIG megafunction for each CPRI line rate to be checked.
For Cyclone IV GX devices, you must implement logic to perform auto-rate
negotiation by reconfiguring the transceiver directly, using the compulsory
ALTGX_RECONFIG megafunction.
section of the Cyclone IV Device Handbook. For information about the
B. Implementing CPRI Link Auto-Rate
Guide.
Phase-Locked Loops Reconfiguration
CPRI MegaCore Function User Guide
Negotiation
Related parts for IP-CPRI
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
IP CORE Renewal Of IPT-C2H-NIOS
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE - XAUI PHY
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE - RLDRAM II Controller
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP CORE - QDRII SRAM Controller
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
MODULE, TX/RX, W/ PSU, IP-LINK
Manufacturer:
TOPCO SNT
Datasheet:
Part Number:
Description:
I2C Controller FPGA IP Core
Manufacturer:
SYSTEM LEVEL SOLUTIONS
Part Number:
Description:
IP CORE - 10 Gbps Ethernet MAC PCS PMA Reference Design
Manufacturer:
Altera
Datasheet:
Part Number:
Description:
IP NIOS II MEGACORE
Manufacturer:
Altera
Datasheet: