FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 156

• Manufacturer Part Number: FDC37C935-QS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C935-QS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Write Status
Default = 0x03, on
POR, Reset_Drv
or Software Reset.
NAME
Table 73 - RTC, Logical Device 6 [Logical Device Number = 0x06]
REG INDEX
Read Only
Bit[7] R/W
Bit[6:0]
0xF4
Bits [1:0]
= 1,1
= 1,0
= 0,0
Bits [6:2] Reserved, set to zero
Bit [7]
= 1 Disables a prefetch of serial EEPROM when the
= 0
Indicates that the Write EEPROM Data
register is ready to accept a pair of bytes.
Bit 0 is cleared on the first write of the Write
EEPROM Data register.
indicates that the serial device controller has
received one byte (LSB) and is waiting for
the second byte (MSB).
Bit 1 is cleared on the second write of the
Write EEPROM Data register indicating that
two bytes have been accepted and that the
serial device interface is busy writing the
word to the EEPROM.
Enables a prefetch of serial EEPROM when
the Serial EEPROM Pointer Register is
written. This will typically be used when the
host CPU wishes random read access from
the serial EEPROM.
Serial EEPROM Pointer Register is written.
This bit is typically set when the host CPU
wishes to perform random word or block
writes to the serial EEPROM.
156
DEFINITION
This status
STATE
C