FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 18

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FDC37C935-QS

Manufacturer Part Number
FDC37C935-QS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C935-QS

Lead Free Status / RoHS Status
Supplier Unconfirmed
TAPE DRIVE REGISTER (TDR)
Address 3F3 READ/WRITE
This register is included for 82077 software
compatability. The robust digital data separator
used
characteristics modified for tape support. The
contents of this register are not used internal to
the device.
software reset.
read in this mode.
Bit 7
Bit 7
X
X
X
X
X
X
1
0
1
0
in
Bit 6
Bit 6
DIGITAL OUTPUT REGISTER
DIGITAL OUTPUT REGISTER
X
X
X
X
X
1
X
0
1
0
the
The TDR is unaffected by a
Bit 5
Bit 5
FDC
X
X
X
X
1
X
X
0
1
0
Bits 2-7 are tri-stated when
Table 6 - Internal 2 Drive Decode - Drives 0 and 1 Swapped
Bit 4
Bit 4
does
X
X
X
1
X
X
X
0
1
0
Table 5 - Internal 2 Drive Decode - Normal
not
Bit1
Bit1
X
0
0
1
1
X
0
0
1
1
require
Bit 0
Bit 0
X
X
0
1
0
1
0
1
0
1
its
DRIVE SELECT OUTPUTS
DRIVE SELECT OUTPUTS
nDS1
nDS1
18
0
1
1
1
1
1
0
1
1
1
(ACTIVE LOW)
(ACTIVE LOW)
TAPE SEL1
0
0
1
1
nDS0
nDS0
1
0
1
1
1
Table 4- Tape Select Bits
0
1
1
1
1
TAPE SEL2
nMTR1
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nBIT 4
MOTOR ON OUTPUTS
nMTR1
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nBIT 5
0
1
0
1
MOTOR ON OUTPUTS
(ACTIVE LOW)
(ACTIVE LOW)
SELECTED
nMTR0
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nBIT 5
nMTR0
DRIVE
nBIT 4
nBIT 4
nBIT 4
nBIT 4
nBIT 4
None
1
2
3

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