FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 163

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FDC37C935-QS

Manufacturer Part Number
FDC37C935-QS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C935-QS

Lead Free Status / RoHS Status
Supplier Unconfirmed
WDT_CFG
Default = 0x00
NAME
Table 74 - Auxilliary I/O, Logical Device 8 [Logical Device Number = 0x08]
REG INDEX
0xF3
Watch-dog timer Configuration
Bit[0] Joy-stick Enable
=1 WDT is reset upon an I/O read or write of the
=0 WDT is not affected by I/O reads or writes to the
Bit[1] Keyboard Enable
=1 WDT is reset upon a Keyboard interrupt.
=0 WDT is not affected by Keyboard interrupts.
Bit[2] Mouse Enable
=1 WDT is reset upon a Mouse interrupt
=0 WDT is not affected by Mouse interrupts.
Bit[3] PWRLED Time-out enable
=1 Enables the Power LED to toggle at a 1Hz rate
=0 Disables the Power LED toggle during Watch-
Bits[7:4] WDT Interrupt Mapping
1111 = IRQ15
.........
0011 = IRQ3
0010 = Invalid
0001 = IRQ1
0000 = Disable
Game Port
Game Port.
with 50 percent duty cycle while the Watch-dog
Status bit is set.
dog timeout status.
163
DEFINITION
STATE
C

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