FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 69

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FDC37C935-QS

Manufacturer Part Number
FDC37C935-QS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C935-QS

Lead Free Status / RoHS Status
Supplier Unconfirmed
MODE
ONLY
FIFO
BIT
3
0
0
0
1
0
0
IDENTIFICATION
BIT
2
0
1
1
1
0
0
INTERRUPT
REGISTER
BIT
1
0
1
0
0
1
0
BIT
0
1
0
0
0
0
0
Highest
Second
Second
Third
Fourth
PRIORITY
LEVEL
Table 32 - Interrupt Control Table
-
None
Receiver Line
Status
Received Data
Available
Character
Timeout
Indication
Transmitter
Holding Register
Empty
MODEM Status
INTERRUPT SET AND RESET FUNCTIONS
INTERRUPT
TYPE
69
None
Overrun Error,
Parity Error,
Framing Error or
Break Interrupt
Receiver Data
Available
No Characters
Have Been
Removed From
or Input to the
RCVR FIFO
during the last 4
Char times and
there is at least 1
char in it during
this time
Transmitter
Holding Register
Empty
Clear to Send or
Data Set Ready
or Ring Indicator
or Data Carrier
Detect
INTERRUPT
SOURCE
Reading the Line
Status Register
Read Receiver
Buffer or the FIFO
drops below the
trigger level.
Reading the
Receiver Buffer
Register
Reading the IIR
Register (if Source
of Interrupt) or
Writing the
Transmitter Holding
Register
Reading the
MODEM Status
Register
RESET CONTROL
INTERRUPT
-

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