FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 183

• Manufacturer Part Number: FDC37C935-QS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C935-QS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

NAME
t10
t11
t12
t13
t14
t15
t16
t1
t2
t3
t4
t5
t6
t7
t8
t9
(DO-D7)
FDRQ,
PDRQ
nIOW
nDACK
nIOR
DATA
AEN
TC
or
nDACK Delay Time from FDRQ High
DRQ Reset Delay from nIOR or nIOW
FDRQ Reset Delay from nDACK Low
nDACK Width
nIOR Delay from FDRQ High
nIOW Delay from FDRQ High
Data Access Time from nIOR Low
Data Set Up Time to nIOW High
Data to Float Delay from nIOR High
Data Hold Time from nIOW High
nDACK Set Up to nIOW/nIOR Low
nDACK Hold after nIOW/nIOR High
TC Pulse Width
AEN Set Up to nIOR/nIOW
AEN Hold from nDACK
TC Active to PDRQ Inactive
DESCRIPTION
t14
FIGURE 11 - DMA TIMING
t1
t6
t5
t11
t3
183
t16
t2
t7
t13
t4
MIN
150
t8
40
10
10
10
60
40
10
0
0
0
5
DATA VALID
t12
TYP
t10
t9
t15
MAX
100
100
100
100
60
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns