FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 157
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FDC37C935-QS
Manufacturer Part Number
FDC37C935-QS
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet
1.FDC37C935-QS.pdf
(203 pages)
Specifications of FDC37C935-QS
Lead Free Status / RoHS Status
Supplier Unconfirmed
- Current page: 157 of 203
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Read EEPROM
Data
Read Status
Table 73 - RTC, Logical Device 6 [Logical Device Number = 0x06]
0xF5 R
0xF6 R
This register allows the host to read data from the
serial EEPROM. Data is not valid in this register
until bit-0 of the Read Status Register is set. Since
the EEPROM is a 16-bit device this register presents
the LSB followed by th MSB for each pair of register
reads. Immediately after the MSB is read bit 0 of the
Read Status Register will be cleared, then the Serial
EEPROM Pointer Register will be auto-incremented,
then the next word of EEPROM data will be fetched,
followed by the Read Status Register, bit 0 being set.
Bit 0 = 1 indicates that data in the Read EEPROM
Data register is valid.
EEPROM Data is read until the next byte is valid.
Reading the Read EEPROM Data register when bit-0
is clear will have no detremental effects; the data will
simply be invalid.
157
This bit is cleared when
C
C
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