FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 64

• Manufacturer Part Number: FDC37C935-QS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C935-QS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

between the accesses of the different drive
types,
compensation values.
When both GAP and WGATE bits of the
PERPENDICULAR MODE COMMAND are both
programmed to "0" (Conventional mode), then
D0, D1, D2, D3, and D4 can be programmed
independently to "1" for that drive to be set
automatically to Perpendicular mode.
mode the following set of conditions also apply:
1. The GAP2 written to a perpendicular drive
2. The write pre-compensation given to a
during a write operation will depend upon the
programmed data rate.
perpendicular mode drive will be 0ns.
nor
having
to
change
write
In this
pre-
64
Note: Bits D0-D3 can only be overwritten when
Software
following
MODE COMMAND:
1. "Software" resets (via the DOR or DSR
2. "Hardware" resets will clear all bits ( GAP,
conventional mode drives any data written
will be at the currently programmed write
pre-compensation.
registers) will only clear GAP and WGATE
bits to "0". D0-D3 are unaffected and retain
their previous value.
WGATE
conventional mode.
OW is programmed as a "1".If either
GAP or WGATE is a "1" then D0-D3 are
ignored.
effect
and
and
hardware
on
D0-D3)
the
resets
PERPENDICULAR
to
"0",
have
i.e
the
all