FDC37C935-QS Standard Microsystems (SMSC), FDC37C935-QS Datasheet - Page 61

• Manufacturer Part Number: FDC37C935-QS
• Manufacturer: Standard Microsystems (SMSC)

Specifications of FDC37C935-QS

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Time) defines the time between when the Head
Load signal goes high and the read/write
The choice of DMA or non-DMA operations is
made by the ND bit. When this bit is "1", the
non-DMA mode is selected, and when ND is "0",
the DMA mode is selected. In DMA mode, data
transfers are signalled by the FDRQ pin. Non-
DMA mode uses the RQM bit and the FINT pin
to signal data transfers.
Configure
The Configure command is issued to select the
special features of the FDC.
command need not be issued if the default
values
requirements.
Configure Default Values:
EIS - No Implied Seeks
EFIFO - FIFO Disabled
POLL - Polling Enabled
FIFOTHR - FIFO Threshold Set to 1 Byte
of
00
01
02
7F
7F
E
F
0
1
..
..
the
2M
64
56
60
4
..
63.5
FDC
2M
0.5
64
63
1
..
128
112
120
1M
8
..
meet
500K
Table 29 - Drive Control Delays (ms)
256
224
240
16
..
the
A Configure
HUT
128
126
127
1M
1
2
..
300K
26.7
426
373
400
..
system
250K
512
448
480
32
..
61
500K
256
252
254
2
4
..
data rate speed selection and are documented
in Table 29. The values are the same for MFM
and FM.
PRETRK - Pre-Compensation Set to Track 0
EIS - Enable Implied Seek. When set to "1", the
FDC will perform a Seek operation before
executing a read or write command. Defaults to
no implied seek.
EFIFO - A "1" disables the FIFO (default). This
means data transfers are asked for on a byte-
by-byte basis. Defaults to "1", FIFO disabled.
The threshold defaults to "1".
POLL - Disable polling of the drives. Defaults to
"0", polling enabled.
interrupt is generated after a reset. No polling is
performed while the drive head is loaded and
the head unload delay has not expired.
FIFOTHR - The FIFO threshold in the execution
phase of read or write commands.
programmable from 1 to 16 bytes. Defaults to
3.75
0.25
2M
0.5
..
4
HLT
1M
7.5
0.5
8
..
1
300K
426
420
423
3.3
6.7
..
500K
16
15
..
2
1
SRT
When enabled, a single
300K
26.7
3.33
1.67
25
..
250K
512
504
508
4
8
.
250K
32
30
..
4
2
This is