MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 1149
MC9S12XDP512CAL
Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet
1.MC9S12XDP512CAL.pdf
(1348 pages)
Specifications of MC9S12XDP512CAL
Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant
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28.3
This section describes the memory map and registers for the Flash module.
28.3.1
The Flash memory map is shown in
addresses between global addresses 0x78_0000 and 0x7F_FFFF. The FPROT register, described in
Section 28.3.2.5, “Flash Protection Register
from accidental program or erase. Three separate memory regions, one growing upward from global
address 0x7F_8000 in the Flash memory (called the lower region), one growing downward from global
address 0x7F_FFFF in the Flash memory (called the higher region), and the remaining addresses in the
Flash memory, can be activated for protection. The Flash memory addresses covered by these protectable
regions are shown in the Flash memory map. The higher address region is mainly targeted to hold the boot
loader code since it covers the vector space. The lower address region can be used for EEPROM emulation
in an MCU without an EEPROM module since it can be left unprotected while the remaining addresses
are protected from program or erase. Default protection settings as well as security information that allows
the MCU to restrict access to the Flash module are stored in the Flash configuration field as described in
Table
Freescale Semiconductor
0x7F_FF08 – 0x7F_FF0C
0x7F_FF00 – 0x7F_FF07
28-1.
Global Address
0x7F_FF0D
0x7F_FF0E
0x7F_FF0F
Memory Map and Register Definition
Module Memory Map
(Bytes)
Size
8
5
1
1
1
Table 28-1. Flash Configuration Field
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure
Backdoor Comparison Key
Refer to
Reserved
Flash Protection byte
Refer to
Flash Nonvolatile byte
Refer to
Flash Security byte
Refer to
28-2. The HCS12X architecture places the Flash memory
(FPROT)”, can be set to protect regions in the Flash memory
Section 28.6.1, “Unsecuring the MCU using Backdoor Key Access”
Section 28.3.2.5, “Flash Protection Register (FPROT)”
Section 28.3.2.8, “Flash Control Register (FCTL)”
Section 28.3.2.2, “Flash Security Register (FSEC)”
Chapter 28 256 Kbyte Flash Module (S12XFTX256K2V1)
Description
1151
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