MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 1226

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
between the written data and the backdoor key data stored in the Flash memory. If all four words of data
are written to the correct addresses in the correct order and the data matches the backdoor keys stored in
the Flash memory, the MCU will be unsecured. The data must be written to the backdoor keys sequentially
starting with 0x7F_FF00–1 and ending with 0x7F_FF06–7. 0x0000 and 0xFFFF are not permitted as
backdoor keys. While the KEYACC bit is set, reads of the Flash memory will return invalid data.
The user code stored in the Flash memory must have a method of receiving the backdoor keys from an
external stimulus. This external stimulus would typically be through one of the on-chip serial ports.
If the KEYEN[1:0] bits are in the enabled state (see
the MCU can be unsecured by the backdoor key access sequence described below:
The backdoor key access sequence is monitored by an internal security state machine. An illegal operation
during the backdoor key access sequence will cause the security state machine to lock, leaving the MCU
in the secured state. A reset of the MCU will cause the security state machine to exit the lock state and
allow a new backdoor key access sequence to be attempted. The following operations during the backdoor
key access sequence will lock the security state machine:
After the backdoor keys have been correctly matched, the MCU will be unsecured. Once the MCU is
unsecured, the Flash security byte can be programmed to the unsecure state, if desired.
In the unsecure state, the user has full control of the contents of the backdoor keys by programming
addresses 0x7F_FF00–0x7F_FF07 in the Flash Configuration Field.
The security as defined in the Flash security byte (0x7F_FF0F) is not changed by using the backdoor key
access sequence to unsecure. The backdoor keys stored in addresses 0x7F_FF00–0x7F_FF07 are
unaffected by the backdoor key access sequence. After the next reset of the MCU, the security state of the
Flash module is determined by the Flash security byte (0x7F_FF0F). The backdoor key access sequence
has no effect on the program and erase protections defined in the Flash protection register.
It is not possible to unsecure the MCU in special single chip mode by using the backdoor key access
sequence in background debug mode (BDM).
1228
1. Set the KEYACC bit in the Flash Configuration Register (FCNFG).
2. Write the correct four 16-bit words to Flash addresses 0xFF00–0xFF07 sequentially starting with
3. Clear the KEYACC bit. Depending on the user code used to write the backdoor keys, a wait cycle
4. If all four 16-bit words match the backdoor keys stored in Flash addresses
1. If any of the four 16-bit words does not match the backdoor keys programmed in the Flash array.
2. If the four 16-bit words are written in the wrong sequence.
3. If more than four 16-bit words are written.
4. If any of the four 16-bit words written are 0x0000 or 0xFFFF.
5. If the KEYACC bit does not remain set while the four 16-bit words are written.
6. If any two of the four 16-bit words are written on successive MCU clock cycles.
0x7F_FF00.
(NOP) may be required before clearing the KEYACC bit.
0x7F_FF00–0x7F_FF07, the MCU is unsecured and the SEC[1:0] bits in the FSEC register are
forced to the unsecure state of 1:0.
MC9S12XDP512 Data Sheet, Rev. 2.21
Section 29.3.2.2, “Flash Security Register
Freescale Semiconductor
(FSEC)”),

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