MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 1198

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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Chapter 29 128 Kbyte Flash Module (S12XFTX128K1V1)
1200
FPHS[1:0]
FPLS[1:0]
FPOPEN
FPHDIS
FPLDIS
RNV6
Field
4:3
1:0
7
6
5
2
Flash Protection Open — The FPOPEN bit determines the protection function for program or erase as shown
in
0 The FPHDIS and FPLDIS bits define unprotected address ranges as specified by the corresponding
1 The FPHDIS and FPLDIS bits enable protection for the address range specified by the corresponding
Reserved Nonvolatile Bit — The RNV[6] bit should remain in the erased state for future enhancements.
Flash Protection Higher Address Range Disable — The FPHDIS bit determines whether there is a
protected/unprotected area in a specific region of the Flash memory ending with global address 0x7F_FFFF.
0 Protection/Unprotection enabled.
1 Protection/Unprotection disabled.
Flash Protection Higher Address Size — The FPHS[1:0] bits determine the size of the protected/unprotected
area as shown
Flash Protection Lower Address Range Disable — The FPLDIS bit determines whether there is a
protected/unprotected area in a specific region of the Flash memory beginning with global address 0x7F_8000.
0 Protection/Unprotection enabled.
1 Protection/Unprotection disabled.
Flash Protection Lower Address Size — The FPLS[1:0] bits determine the size of the protected/unprotected
area as shown in
Table
FPHS[1:0] and FPLS[1:0] bits. For an MCU without an EEPROM module, the FPOPEN clear state allows the
main part of the Flash block to be protected while a small address range can remain unprotected for EEPROM
emulation.
FPHS[1:0] and FPLS[1:0] bits.
1 For range sizes, refer to
29-10.
FPOPEN
FPHS[1:0]
1
1
1
1
0
0
0
0
inTable
00
01
10
11
Table 29-11. Flash Protection Higher Address Range
Table
29-11. The FPHS[1:0] bits can only be written to while the FPHDIS bit is set.
FPHDIS
29-12. The FPLS[1:0] bits can only be written to while the FPLDIS bit is set.
Table 29-10. Flash Protection Function
Table 29-9. FPROT Field Descriptions
1
1
0
0
1
1
0
0
MC9S12XDP512 Data Sheet, Rev. 2.21
0x7F_C000–0x7F_FFFF
0x7F_F800–0x7F_FFFF
0x7F_F000–0x7F_FFFF
0x7F_E000–0x7F_FFFF
Table 29-11
FPLDIS
Address Range
1
0
1
0
1
0
1
0
Global
and
No Protection
Protected Low Range
Protected High Range
Protected High and Low Ranges
Full Flash memory Protected
Unprotected Low Range
Unprotected High Range
Unprotected High and Low Ranges
Description
Table
29-12.
Function
Protected Size
16 Kbytes
2 Kbytes
4 Kbytes
8 Kbytes
1
Freescale Semiconductor

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