MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 614

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Chapter 17 Memory Mapping Control (S12XMMCV2)
17.1.2.2
17.1.3
Figure 1-1
17.2
The user is advised to refer to the SoC Guide for port configuration and location of external bus signals.
Some pins may not be bonded out in all implementations.
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EEPROM
FLASH
Wait mode
MMC is functional during wait mode.
Stop mode
MMC is inactive during stop mode.
Single chip modes
In normal and special single chip mode the internal memory is used. External bus is not active.
Expanded modes
Address, data, and control signals are activated in normal expanded and special test modes when
accessing the external bus.
Emulation modes
External bus is active to emulate via an external tool the normal expanded or the normal single chip
mode.
EBI
External Signal Description
shows a block diagram of the MMC.
Block Diagram
Functional Modes
MMC
BDM
MC9S12XDP512 Data Sheet, Rev. 2.21
Figure 17-1. MMC Block Diagram
Address Decoder & Priority
Target Bus Controller
RAM
CPU
Peripherals
XGATE
Freescale Semiconductor
DBG