MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 135

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

4.3.2.4
This register controls the conversion sequence length, FIFO for results registers and behavior in Freeze
Mode. Writes to this register will abort current conversion sequence but will not start a new sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
Reset
Field
S8C
S4C
S2C
S1C
W
6
5
4
3
R
ATD Control Register 3 (ATDCTL3)
0
0
7
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
Conversion Sequence Length — This bit controls the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
= Unimplemented or Reserved
S8C
0
6
Figure 4-6. ATD Control Register 3 (ATDCTL3)
Table 4-8. ATDCTL3 Field Descriptions
MC9S12XDP512 Data Sheet, Rev. 2.21
S4C
1
5
Chapter 4 Analog-to-Digital Converter (ATD10B16CV4) Block Description
S2C
0
4
Description
S1C
0
3
FIFO
0
2
FRZ1
0
1
Table 4-9
Table 4-9
Table 4-9
Table 4-9
FRZ0
0
0
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