M68HC12A4EVB Freescale Semiconductor, M68HC12A4EVB Datasheet - Page 117

• Manufacturer Part Number: M68HC12A4EVB
• Manufacturer: Freescale Semiconductor

Specifications of M68HC12A4EVB

• Lead Free Status / Rohs Status: Not Compliant

10.7 Clock Registers
This section describes the clock registers. All register addresses shown reflect the reset state. Registers
may be mapped to any 2-Kbyte space.
10.7.1 Slow Mode Divider Register
SLDV2–SLDV0 — Slow Mode Divisor Selector Bits
Freescale Semiconductor
The value 2 raised to the power indicated by these three bits produces the slow mode frequency
divider. The range of the divider is 2 to 128 by steps of power of 2. When the bits are clear, the divider
is bypassed.
example oscillator frequencies.
SLDV2
Address: $00E0
0
0
0
0
1
1
1
1
Reset:
Read:
Write:
Table 10-2
SLDV1
Bit 7
0
0
0
0
1
1
0
0
1
1
Figure 10-5. Slow Mode Divider Register (SLOW)
Table 10-2. Slow Mode Register Divider Rates
shows the divider for all bit conditions and the resulting bus rate for three
= Unimplemented
SLDV0
6
0
0
0
1
0
1
0
1
0
1
M68HC12B Family Data Sheet, Rev. 9.1
Divider
5
0
0
(2
128
Off
16
32
64
2
4
8
x
)
4
0
0
Oscillator)
Bus Rate
62.5 kHz
(16-MHz
500 kHz
250 kHz
125 kHz
8 MHz
4 MHz
2 MHz
1 MHz
3
0
0
Oscillator)
SLDV2
Bus Rate
62.5 kHz
31.2 kHz
500 kHz
250 kHz
125 kHz
(8-MHz
4 MHz
2 MHz
1 MHz
2
0
SLDV1
1
0
Oscillator)
Bus Rate
62.5 kHz
31.2 kHz
15.6 kHz
500 kHz
250 kHz
125 kHz
(4-MHz
2 MHz
1 MHz
SLDV0
Bit 0
0
Clock Registers
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