M68HC12A4EVB Freescale Semiconductor, M68HC12A4EVB Datasheet - Page 283

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M68HC12A4EVB

Manufacturer Part Number
M68HC12A4EVB
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of M68HC12A4EVB

Lead Free Status / Rohs Status
Not Compliant
SCAN — Enable Continuous Channel Scan Bit
MULT — Enable Multichannel Conversion Bit
CD, CC, CB, and CA — Channel Select for Conversion Bits
Freescale Semiconductor
When a conversion sequence is initiated by a write to the ATDCTL register, the user has a choice of
performing a sequence of four (or eight, depending on the S8CM bit) conversions or continuously
performing four (or eight) conversion sequences.
0 = Single conversion sequence
1 = Continuous conversion sequences (scan mode)
0 = ATD sequencer runs all four or eight conversions on a single input channel selected via the CD,
1 = ATD sequencer runs each of the four or eight conversions on sequential channels in a specific
CC, CB, and CA bits.
group. Refer to
S8CM
0
0
0
0
1
Table 17-4. Multichannel Mode Result Register Assignment
CD
0
0
1
1
0
Table
CC
0
1
0
1
0
0
0
0
1
1
1
1
17-4.
M68HC12B Family Data Sheet, Rev. 9.1
CB
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
CA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Channel Signal
(V
Test/reserved
Reserved
Reserved
Reserved
Reserved
RH
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
V
V
+ V
RH
RL
RL
)/2
Result in ADRx
if MULT = 1
ADR0
ADR1
ADR2
ADR3
ADR0
ADR1
ADR2
ADR3
ADR0
ADR1
ADR2
ADR3
ADR0
ADR1
ADR2
ADR3
ADR0
ADR1
ADR2
ADR3
ADR4
ADR5
ADR6
ADR7
ATD Registers
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