M68HC12A4EVB Freescale Semiconductor, M68HC12A4EVB Datasheet - Page 173

• Manufacturer Part Number: M68HC12A4EVB
• Manufacturer: Freescale Semiconductor

Specifications of M68HC12A4EVB

• Lead Free Status / Rohs Status: Not Compliant

Read: Anytime
Write: Used in clearing mechanism (set bits cause corresponding bits to be
TFLG2 indicates when interrupt conditions have occurred. To clear a bit in the flag register, set the bit to 1.
TOF — Timer Overflow Flag
13.4.10 Timer Input Capture/Output Compare Registers
Freescale Semiconductor
TOF is set when the 16-bit free-running timer overflows from $FFFF to $0000. This bit is cleared
automatically by a write to the TFLG2 register with bit 7 set. See the explanation of the TCRE control
bit in
PTN
cleared). Any access to TCNT will clear the TFLG2 register, if the TFFCA
bit in the TSCR register is set.
13.4.8 Timer Interrupt Mask
Address: $008F
Address: $0090–$0091
DETECTOR
Figure 13-21. Timer Input Capture/Output Compare Register 0 (TC0)
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
EDGE
Bit 15
Bit 7
TOF
Bit 7
Bit 7
Bit 7
0
0
0
Figure 13-20. Main Timer Interrupt Flag 2 (TFLG2)
Figure 13-19. C3F–C0F Interrupt Flag Setting
COUNTER
DELAY
Bit 14
Bit 6
6
0
0
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
Registers.)
Bit 13
Bit 5
5
0
0
5
0
5
0
TCN INPUT CAPTURE
16-BIT MAIN TIMER
TCNH IC HOLDING
REGISTER
REGISTER
Bit 12
Bit 4
4
0
0
4
0
4
0
Bit 11
Bit 3
3
0
0
3
0
3
0
BUFEN • LATQ • TFMOD
Bit 10
Bit 2
2
0
0
2
0
2
0
Bit 9
Bit 1
1
0
0
1
0
1
0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
0
0
0
0
Timer Registers
SET CNF
INTERRUPT
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