M68HC12A4EVB Freescale Semiconductor, M68HC12A4EVB Datasheet - Page 188

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M68HC12A4EVB

Manufacturer Part Number
M68HC12A4EVB
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of M68HC12A4EVB

Lead Free Status / Rohs Status
Not Compliant
Enhanced Capture Timer (ECT) Module
Read: Anytime
Write: Has no effect
These registers are used to latch the value of the input capture registers TC0–TC3. The corresponding
IOSx bits in TIOS ($80) should be cleared (see
188
Address: $00BA
Address: $00BB
Address: $00BC
Address: $00BD
Address: $00BE
Address: $00BF
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Figure 13-52. Timer Input Capture Holding Register 1 (TC1H)
Figure 13-53. Timer Input Capture Holding Register 2 (TC2H)
Figure 13-54. Timer Input Capture Holding Register 3 (TC3H)
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
0
0
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
6
0
6
0
6
0
6
0
6
0
6
0
M68HC12B Family Data Sheet, Rev. 9.1
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
5
0
5
0
5
0
5
0
5
0
5
0
13.3.1 IC
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
4
0
4
0
4
0
4
0
4
0
4
0
Channels).
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
3
0
3
0
3
0
3
0
3
0
3
0
Bit 10
Bit 10
Bit 10
Bit 2
Bit 2
Bit 2
2
0
2
0
2
0
2
0
2
0
2
0
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
1
0
1
0
1
0
1
0
1
0
1
0
Freescale Semiconductor
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 0
0
0
0
0
0
0