M68HC12A4EVB Freescale Semiconductor, M68HC12A4EVB Datasheet - Page 303

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M68HC12A4EVB

Manufacturer Part Number
M68HC12A4EVB
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of M68HC12A4EVB

Lead Free Status / Rohs Status
Not Compliant
BK1RW — R/W Compare Value Bit
BK0RWE — R/W Compare Enable Bit
BK0RW — R/W Compare Value Bit
18.4.2.3 Breakpoint Address Register High
These bits are used to compare against the most significant byte of the address bus.
18.4.2.4 Breakpoint Address Register Low
These bits are used to compare against the least significant byte of the address bus. These bits may be
excluded from being used in the match if BK0ALE = 0.
Freescale Semiconductor
When BK1RWE = 1, this bit determines the type of bus cycle to match.
Enables the comparison of the R/W signal to further specify what causes a match. This bit is not useful
in program breakpoints.
When BK0RWE = 1, this bit determines the type of bus cycle to match.
0 = A write cycle is matched.
1 = A read cycle is matched.
0 = R/W is not used in the comparisons.
1 = R/W is used in comparisons.
0 = Write cycle is matched.
1 = Read cycle is matched.
Power on reset:
Power on reset:
BK1RWE BK1RW BK0RWE BK0RW
0
1
1
Address: $0022
Address: $0023
Read:
Read:
Write:
Write:
Figure 18-12. Breakpoint Address Register High (BRKAH)
Figure 18-13. Breakpoint Address Register Low (BRKAL)
X
0
1
Bit 15
Bit 7
Bit 7
Bit 7
0
0
Table 18-9. Breakpoint Read/Write Control
0
1
1
M68HC12B Family Data Sheet, Rev. 9.1
14
6
0
6
6
0
X
0
1
13
5
0
5
5
0
R/W is don’t care for full mode or dual mode BKP0
R/W is write for full mode or dual mode BKP0
R/W is read for full mode or dual mode BKP0
R/W is don’t care for dual mode BKP1
R/W is write for dual mode BKP1
R/W is read for dual mode BKP1
12
4
0
4
4
0
Read/Write Selected
11
3
0
3
3
0
10
2
0
2
2
0
1
9
0
1
1
0
Bit 0
Bit 8
Bit 0
Bit 0
0
0
Breakpoints
303