M68HC12A4EVB Freescale Semiconductor, M68HC12A4EVB Datasheet - Page 203

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M68HC12A4EVB

Manufacturer Part Number
M68HC12A4EVB
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of M68HC12A4EVB

Lead Free Status / Rohs Status
Not Compliant
14.3.3 SS Output
Available in master mode only, SS output is enabled with the SSOE bit in the SP0CR1 register if the
corresponding DDRS bit is set. The SS output pin is connected to the SS input pin of the external slave
device. The SS output automatically goes low for each transmission to select the external device and it
goes high during each idling state to deselect external devices.
Freescale Semiconductor
SCK (CPOL = 0)
SCK (CPOL = 1)
SAMPLE I
MOSI/MISO
CHANGE O
CHANGE O
SEL SS (O)
MASTER ONLY
SEL SS (I)
MOSI PIN
MISO PIN
LSB first (LSBF = 1) :
MSB first (LSBF= 0) :
TRANSFER
DDS7
t
L
0
0
1
1
Figure 14-13. SPI Clock Format 1 (CPHA = 1)
MSB
LSB
SSOE
0
1
0
1
Table 14-3. SS Output Selection
M68HC12B Family Data Sheet, Rev. 9.1
BEGIN
Bit 6
Bit 1
SS input with MODF feature
Reserved
General-purpose output
SS output
Bit 5
Bit 2
Master Mode
Bit 4
Bit 3
Bit 3
Bit 4
Bit 2
Bit 5
Slave Mode
Bit 1
Bit 6
END
SS input
SS input
SS input
SS input
Serial Peripheral Interface (SPI)
MSB
LSB
t
T
Minimum 1/2 SCK
t
I
for t
t
T
L
, t
l
, t
L
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