M68HC12A4EVB Freescale Semiconductor, M68HC12A4EVB Datasheet - Page 305
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M68HC12A4EVB
Manufacturer Part Number
M68HC12A4EVB
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.M68HC12A4EVB.pdf
(334 pages)
Specifications of M68HC12A4EVB
Lead Free Status / Rohs Status
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Table 18-10
pin does not affect the function of the other. The presence of logic level 0 on either pin at the fall of ECLK
performs the indicated function. Tagging is allowed in all modes. Tagging is disabled when BDM becomes
active and BDM serial commands are not processed while tagging is active.
The tag follows the information in the queue as the queue is advanced. When a tagged instruction
reaches the head of the queue, the CPU enters active background debug mode rather than executing the
instruction. This is the mechanism by which a development system initiates hardware breakpoints.
Currently, the tool configuration shown in
Freescale Semiconductor
shows the functions of the two tagging pins. The pins operate independently; the state of one
TAGHI
1
1
0
0
Figure 18-16. BDM Tool Connector
M68HC12B Family Data Sheet, Rev. 9.1
Table 18-10. Tag Pin Function
Figure 18-16
BKGD
TAGLO
V
NC
FP
1
0
1
0
1
3
5
is used.
2
4
6
GND
RESET
V
DD
Both bytes
High byte
Low byte
No tag
Tag
Instruction Tagging
305