M68HC12A4EVB Freescale Semiconductor, M68HC12A4EVB Datasheet - Page 296

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M68HC12A4EVB

Manufacturer Part Number
M68HC12A4EVB
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of M68HC12A4EVB

Lead Free Status / Rohs Status
Not Compliant
Development Support
18.3.5 BDM Instruction Register
This section describes the BDM instruction register under hardware command and firmware command.
18.3.5.1 Hardware Command
The bits in the BDM instruction register have the following meanings when a hardware command is
executed.
H/F — Hardware/Firmware Flag
DATA — Data Flag
R/W — Read/Write Flag
BKGND — Hardware Request to Enter Active Background Mode
W/B — Word/Byte Tansfer Flag
BD/U — BDM Map/User Map Flag
296
Indicates whether BDM registers and ROM are mapped to addresses $FF00 to $FFFF in the standard
64-Kbyte address space. Used only by hardware read/write commands.
0 = Firmware instruction
1 = Hardware instruction
0 = No data
1 = Data included in command
0 = Write
1 = Read
0 = Not a hardware background command
1 = Hardware background command (INSTRUCTION = $90)
0 = Byte transfer
1 = Word transfer
0 = BDM resources not in map
1 = BDM resources in map
Address: $FF00
Reset:
Read:
Write:
Figure 18-4. BDM Instruction Register (INSTRUCTION)
Bit 7
H/F
0
DATA
6
0
M68HC12B Family Data Sheet, Rev. 9.1
R/W
5
0
BKGND
4
0
W/B
3
0
BD/U
2
0
1
0
0
Freescale Semiconductor
Bit 0
0
0