EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 114
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX45DF29I5N
Manufacturer:
ALTERA
Quantity:
201
Company:
Part Number:
EP2AGX45DF29I5N
Manufacturer:
ALTERA
Quantity:
853
- EP2AGX45CU17C6N PDF datasheet
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- EP2AGX45CU17C6N PDF datasheet #5
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5–10
Table 5–4. Clock Input Pin Connectivity to RCLK Networks for Arria II GX Devices
Table 5–5. Clock Input Pin Connectivity to the RCLK Networks for Arria II GZ Devices
Arria II Device Handbook Volume 1: Device Interfaces and Integration
RCLK [12, 14, 16, 18, 20, 22]
RCLK [13, 15, 17, 19, 21, 23]
RCLK [24..35]
RCLK [36, 38, 40, 42, 44, 46]
RCLK [37, 39, 41, 43, 45, 47]
RCLK [0, 4, 6, 10]
RCLK [1, 5, 7, 11]
RCLK [2, 8]
RCLK [3, 9]
RCLK [13, 17, 21, 23,
27, 31]
RCLK [12, 16, 20, 22,
26, 30]
RCLK [15, 19, 25, 29]
RCLK [14, 18, 24, 28]
RCLK [35, 41]
RCLK [34, 40]
RCLK [33, 37, 39, 43]
RCLK [32, 36, 38, 42]
RCLK [47, 51, 57, 61]
RCLK [46, 50, 56, 60]
RCLK [45, 49, 53, 55,
59, 63]
RCLK [44, 48, 52, 54,
58, 62]
Clock Resource
Clock Resource
Table 5–4
and RCLKs in Arria II devices. A given clock input pin can drive two adjacent RCLK
networks to create a dual-RCLK network.
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Table 5–5
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list the connectivity between the dedicated clock input pins
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CLK (p/n Pins)
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7
Chapter 5: Clock Networks and PLLs in Arria II Devices
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CLK (p/n Pins)
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December 2010 Altera Corporation
Clock Networks in Arria II Devices
11
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