EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 425
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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Chapter 1: Transceiver Architecture in Arria II Devices
Receiver Channel Datapath
Table 1–12. Word Aligner Options Available in Basic Single-Width and Double-Width Modes for Arria II
Devices
December 2010 Altera Corporation
Basic
Double-Width
Note to
(1) For more information about word aligner operation, refer to
Functional
Mode
Table
(Note 1)
1–12:
PMA-PCS
(Part 2 of 2)
Interface
Width
16-bit
20-bit
Word Alignment
Alignment
Alignment
Manual
Bit-Slip
Manual
Bit-Slip
Mode
8-, 16-, and
8-, 16-, and
7-, 10-, and
7-, 10-, and
Alignment
Pattern
Length
32-bit
32-bit
20-bit
20-bit
Word
“Word Aligner” on page
rx_enapatternalign
Rising Edge
Rising Edge
Sensitivity
Sensitive
Sensitive
—
—
1–30.
Arria II Device Handbook Volume 2: Transceivers
pattern. Goes low
alignment pattern
pattern. Goes low
alignment pattern
rx_enapattern
rx_enapattern
the word aligner
the word aligner
Stays high after
word alignment
Stays high after
word alignment
rx_syncstatus
rising edge on
rising edge on
on receiving a
on receiving a
align until a
align until a
aligns to the
aligns to the
is received.
is received.
new word
new word
Behavior
—
—
pattern appears in
pattern appears in
pattern appears in
pattern appears in
rx_patterndetect
Asserted high for
one parallel clock
Asserted high for
one parallel clock
Asserted high for
one parallel clock
Asserted high for
one parallel clock
the current word
the current word
the current word
the current word
word alignment
word alignment
word alignment
word alignment
cycle when the
cycle when the
cycle when the
cycle when the
boundary.
boundary.
boundary.
boundary.
Behavior
1–39
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