EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 210
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EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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7–14
Figure 7–11. Number of DQ/DQS Groups per Bank in EP2AGZ300 and EP2AGZ350 Devices in the 780-Pin FineLine BGA
Package
Notes to
(1) These numbers are preliminary until the devices are available.
(2) EP2AGZ300 and EP2AGZ350 devices do not support ×32/×36 mode. To interface with a ×36 QDR II+/QDR II SRAM device, refer to
Arria II Device Handbook Volume 1: Device Interfaces and Integration
×16/×18 DQ/DQS Groups for ×36 QDR II+/QDR II SRAM Interface” on page
Figure
(Note
7–11:
1),
(2)
Figure 7–11
EP2AGZ300 and EP2AGZ350 devices in the 780-pin FineLine BGA package.
DLL1
DLL0
shows the number of DQ/DQS groups per bank in Arria II GZ
40 User I/Os
40 User I/Os 32 User I/Os 32 User I/Os
I/O Bank 8A
×16/×18=1
I/O Bank 3A
×16/×18=1
×8/×9=3
×8/×9=3
×4=6
×4=6
EP2AGZ300 and EP2AGZ350 Devices
in the 780-Pin FineLine BGA
32 User I/Os
I/O Bank 8C
I/O Bank 3C
×16/×18=0
×16/×18=0
×8/×9=1
×8/×9=1
×4=3
×4=3
I/O Bank 4C
32 User I/Os
I/O Bank 7C
×16/×18=0
×16/×18=0
×8/×9=1
×8/×9=1
×4=3
×4=3
7–21.
Chapter 7: External Memory Interfaces in Arria II Devices
40 User I/Os
40 User I/Os
I/O Bank 4A
×16/×18=1
I/O Bank 7A
×16/×18=1
×8/×9=3
×8/×9=3
×4=6
×4=6
Memory Interfaces Pin Support for Arria II Devices
DLL3
DLL2
December 2010 Altera Corporation
“Combining
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