EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 539

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EP2AGX45DF29I5

Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX45DF29I5

Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Chapter 2: Transceiver Clocking in Arria II Devices
FPGA Fabric-Transceiver Interface Clocking
December 2010 Altera Corporation
Limitations of Quartus II Software-Selected Receiver Phase Compensation FIFO Read Clock
In non-bonded channel configurations without a rate matcher, the Quartus II software
cannot determine if the incoming serial data in all channels has a 0 PPM frequency
difference. The Quartus II software uses the recovered clock rx_clkout signal from
each channel to clock the read port of its receiver phase compensation FIFO, resulting
in one clock resource (global, regional, or both) being used per channel for the
rx_clkout signal.
Arria II Device Handbook Volume 2: Transceivers
2–49

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