EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 38
EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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2–10
Figure 2–9. Template for Supported 7-Input Functions in Extended LUT Mode
Note to
(1) If the 7-input function is unregistered, the unused eighth input is available for register packing. The second register, reg1, is not available.
Arria II Device Handbook Volume 1: Device Interfaces and Integration
Figure
2–9:
datae0
datae1
dataf0
dataf1
datac
dataa
datab
datad
(1)
Extended LUT Mode
Use extended LUT mode to implement a specific set of 7-input functions. The set must
be a 2-to-1 multiplexer fed by two arbitrary 5-input functions sharing four inputs.
Figure 2–9
mode. In this mode, if the 7-input function is unregistered, the unused eighth input is
available for register packing.
Functions that fit into the template, as shown in
“if-else” statements in Verilog HDL or VHDL code.
This input is available
for register packing.
shows the template of supported 7-input functions using extended LUT
5-Input
5-Input
LUT
LUT
combout0
Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Arria II Devices
D
reg0
Figure
Q
2–9, often appear in designs as
December 2010 Altera Corporation
To general or
To general or
local routing
local routing
Adaptive Logic Modules
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