EP2AGX45DF29I5 Altera, EP2AGX45DF29I5 Datasheet - Page 434
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EP2AGX45DF29I5
Manufacturer Part Number
EP2AGX45DF29I5
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
Specifications of EP2AGX45DF29I5
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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1–48
Arria II Device Handbook Volume 2: Transceivers
Figure 1–48
transceiver blocks in Arria II GZ devices.
Figure 1–48. Arria II GZ Transceiver Calibration Blocks Location and Connection
Notes to
(1) You must connect a separate 2 k(tolerance max ± 1%) external resistor on each RREF pin in the Arria II device to
(2) The Quartus II software automatically selects the appropriate calibration block based on the pin assignments of the
(3) For RREF pin information, refer to the
The calibration block internally generates a constant internal reference voltage,
independent of PVT variations and uses this voltage and the external reference
resistor on the RREF pin to generate constant reference currents. These reference
currents are used by the analog block calibration circuit to calibrate the transceiver
blocks.
The OCT calibration circuit calibrates the OCT resistors present in the transceiver
channels. You can enable the OCT resistors in the transceiver channels through the
ALTGX MegaWizard Plug-In Manager.
(3)
GND. To ensure proper operation of the calibration block, the RREF resistor connection in the board must be free from
external noise.
transceiver tx_dataout and rx_datain pins.
Figure
shows the location of the calibration block and how it is connected to the
1–48:
2K
2K
Ω
Ω
Calibration
Calibration
Block L1
Block L0
GXBL1
GXBL0
GXBL2
GXBL3
Device Pin Connection
Arria II GZ
Device
Chapter 1: Transceiver Architecture in Arria II Devices
Guidelines.
Calibration
Calibration
Block R0
Block R1
GXBR1
GXBR2
GXBR0
GXBR3
December 2010 Altera Corporation
2K
2K
Ω
Ω
(Note
Calibration Block
1), (2),
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