MC68EN360ZQ25VL Freescale Semiconductor, MC68EN360ZQ25VL Datasheet - Page 868

• Manufacturer Part Number: MC68EN360ZQ25VL
• Description: IC MPU QUICC 32BIT 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68EN360ZQ25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3V
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Electrical Characteristics
10.17 040 BUS TYPE SRAM/DRAM CYCLES AC ELECTRICAL
(The electrical specifications in this document are preliminary
10-56
SPECIFICATIONS
NOTES:
1.Transfer attributes signals = SIZx, TTx, TMx, R/W, and LOCK.
2.TEA/TA should not be asserted on a DRAM burst access, or on the same clock or before RASx /
Num.
280A
284A Clock Low to BRK Low
295A Clock High to CAS¯ High (040 Burst Read only)
288
289
290
300
301
280
281
282
283
284
285
286
287
291
292
293
294
295
296
297
298
299
302
303
305
306
CSx is asserted
1
2
2
2
2
Address Invalid to BADD2–3 Invalid
Address Valid to BADD2–3 Valid
Clock High to CS¯/RAS¯ Low (TSS40=0)
Clock High to CS¯/RAS¯ High (CSNT40=0)
Clock High to BRK Low
Clock High to BRK High
Clock Low to CS¯ /RASx Low (TSS40=1)
Clock Low to CS¯ /RASx High (CSNT40=1)
AddressTransfer Attributes Valid to Clock High
(TSS40=0)
TA Low to Clock High (External Termination)
Clock High to TA High (External Termination)
Clock High to OE Low (Read Cycles)
Clock High to OE High (Read Cycles)
Clock High to WE Low (Write Cycles)
Clock High to WE High (Write Cycles)
Clock High to CAS¯ Low
Clock High to CAS¯ High
Clock Low to AMUX Low
Clock High to AMUX High
Clock High to BADD2–3 Valid (040 Burst Cycles)
TEA Low to Clock High
Clock High to TEA High
Data, Parity Valid to Clock High (Data, Parity Set-
up)
Clock High to Data, Parity Invalid (Data, Parity
Hold)
CLKO1 High (After TS low) to Parity Valid
CLKO1 High (After TA low) to Parity Hi-Z
BADD2–3 Valid to CAS assertion
Freescale Semiconductor, Inc.
Characteristic
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
.
See Figure 10-44–Figure 10-48)
3.3 V or 5.0 V
Min
15
12
11
11
25.0 MHz
—
—
—
—
—
—
—
—
—
—
0
4
4
4
4
4
4
4
3
3
4
2
7
7
4
Max
20
16
16
20
20
20
16
16
—
20
20
20
20
20
13
13
13
16
16
20
20
—
—
20
20
—
—
—
—
Min
10
11
—
—
—
—
—
—
—
—
—
—
33.34MHz
0
4
4
4
4
9
4
4
4
3
3
4
2
6
5
5.0V
Max
15
12
12
15
15
15
12
12
15
15
15
15
15
10
10
10
12
12
15
15
15
15
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns