TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 18

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

15. Flash Memory Operation
16. ROM protection
17. Electrical Characteristics
x
15.1 Flash Memory......................................................................................................................365
15.2 Operation Mode...................................................................................................................368
15.3 On-board Programming of Flash Memory (Rewrite/Erase)................................................406
16.1 Outline.................................................................................................................................421
16.2 Future...................................................................................................................................421
16.3 Register................................................................................................................................422
16.4 Writing and erasing..............................................................................................................425
17.1 Absolute Maximum Ratings................................................................................................427
15.1.1
15.1.2
15.2.1
15.2.2
15.2.3
15.2.4
15.2.5
15.2.6
15.2.7
15.2.8
15.2.9
15.2.10
15.2.11
15.3.1
16.2.1
16.2.2
16.3.1
16.3.2
16.4.1
16.4.2
15.2.2.1
15.2.2.2
15.2.3.1
15.2.9.1
15.2.9.2
15.2.9.3
15.2.9.4
15.2.10.1
15.2.10.2
15.2.10.3
15.2.10.4
15.2.10.5
15.2.10.6
15.2.10.7
15.2.10.8
15.2.10.9
15.3.1.1
15.3.1.2
15.3.1.3
15.3.1.4
15.3.1.5
15.3.1.6
15.3.1.7
15.3.1.8
Features..........................................................................................................................................................................365
Block Diagram of the Flash Memory Section...............................................................................................................367
Reset Operation..............................................................................................................................................................369
User Boot Mode (Single chip mode).............................................................................................................................370
Single Boot Mode..........................................................................................................................................................378
Configuration for Single Boot Mode.............................................................................................................................381
Memory Map.................................................................................................................................................................382
Interface specification....................................................................................................................................................383
Data Transfer Format.....................................................................................................................................................384
Restrictions on internal memories.................................................................................................................................384
Transfer Format for Single Boot Mode commands.......................................................................................................384
Flash Memory................................................................................................................................................................406
Write/ erase-protection function....................................................................................................................................421
Security function............................................................................................................................................................421
FCFLCS (Flash control register)...................................................................................................................................423
FCSECBIT(Security bit register)...................................................................................................................................424
Protection bits................................................................................................................................................................425
Security bit.....................................................................................................................................................................425
Operation of Boot Program..........................................................................................................................................391
General Boot Program Flowchart................................................................................................................................405
(1-A) Method 1: Storing a Programming Routine in the Flash Memory
(1-B) Method 2: Transferring a Programming Routine from an External Host
(2-A) Using the Program in the On-Chip Boot ROM
RAM Transfer
Show Flash Memory SUM
Transfer Format for the Show Product Information
Chip Erase and Protect Bit Erase
Block Configuration
Basic operation
Reset(Hardware reset)
Commands
Flash control/ status register
List of Command Sequences
Address bit configuration for bus write cycles
Flowchart
RAM Transfer Command
Show Flash Memory SUM Command
Show Product Information Command
Chip and Protection Bit Erase Command
Acknowledge Responses
Determination of a Serial Operation Mode
Password
Calculation of the Show Flash Memory Sum Command
Checksum Calculation