TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 223

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

9.6.3
can be either low-active or high-active.
to reverse when the set value of the up-counter (UC) matches the set values of the timer registers (TBxRG0 and
TBxRG1). Note that the set values of TBxRG0 and TBxRG1 must satisfy the following requirement:
when the set value of the up-counter matches the set value of TBxRG1. This facilitates handling of small duties.
Figure 9-2 Example of Output of Programmable Pulse Generation (PPG)
16-bit PPG (Programmable Pulse Generation) Output Mode
Square waves with any frequency and any duty (programmable square waves) can be output. The output pulse
Programmable square waves can be output from the TBxOUT pin by triggering the timer flip-flop (TBxFF)
(Set value of TBxRG0) < (Set value of TBxRG1)
In this mode, by enabling the double buffering of TBxRG0, the value of register buffer 0 is shifted into TBxRG0
Match with TBxRG0
Match with TBxRG1
TBxRG0
(compare value)
Register buffer
Match with TBxRG0
(INTTBx interrupt)
Match with TBxRG1
(INTTBx interrupt)
TBxOUT pin
Figure 9-3 Register Buffer Operation
Up-counter= Q
Page 203
Q
1
Q
2
1
Trigger to shift to TBxRG1
Up-counter= Q
Write TBxRG0
Q
2
TMPM333FDFG/FYFG/FWFG
2
Q
3