TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 83

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

7.5
External
interrupt
pin
7.5.1
settings must be made in the clock generator.
7.5.1.1
Interrupts
This chapter describes routes, sources and required settings of interrupts.
The CPU is notified of interrupt requests by the interrupt signal from each interrupt source.
It sets priority on interrupts and handles an interrupt request with the highest priority.
Interrupt requests for clearing a standby mode are notified to the CPU via the clock generator. Therefore, appropriate
Interrupt Sources
CPU (route1).
pin (route 3) are input to the clock generator and are input to the CPU through the logic for releasing standby
(route 4 and 5).
CPU, not through the logic for standby release (route 6).
Figure 7-1 shows an interrupt request route.
The interrupts issued by the peripheral function that is not used to release standby are directly input to the
The peripheral function interrupts used to release standby (route 2) and interrupts from the external interrupt
If interrupts from the external interrupt pins are not used to release standby, they are directly input to the
Interrupt Route
Port
Peripheral
function
Peripheral
function
Figure 7-1 Interrupt Route
Page 63
standby
Clock generator
Exiting
mode
<INTxEN>
0
1
Interruptrequest
TMPM333FDFG/FYFG/FWFG
CPU