TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 81

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

7.2
Reset Exceptions
Reset exceptions are generated from the following three sources.
Use the Reset Flag (CGRSTFLG) Register of the Clock Generator to identify the source of a reset.
Note:Do not reset with <SYSRESETREQ> in SLOW mode.
・ External reset pin
・ Reset exception by WDT
・ Reset exception by SYSRESETREQ
Control Register.
A reset exception occurs when an external reset pin changes from "Low" to "High".
The watchdog timer (WDT) has a reset generating feature. For details, see the chapter on the WDT.
A reset can be generated by setting the SYSRESETREQ bit in the NVIC's Application Interrupt and Reset
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TMPM333FDFG/FYFG/FWFG