TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 238

• Manufacturer Part Number: TMPM333FDFG
• Description: Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
• Manufacturer: Toshiba

Specifications of TMPM333FDFG

• Processor Series: TX03
• Core: ARM Cortex M3
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 512K
• Rom Type: Flash
• Ram (kbytes): 32K
• Number Of Pins: 100
• Package: LQFP(14×14)
• Vcc: 3V
• Cpu Mhz: 40
• Ssp (ch) Spi: -
• I2c/sio (ch): 3
• Uart/sio (ch): 3
• Usb: -
• Can: -
• Ethernet: -
• External Bus Interface: -
• Cs/wait Controller (ch): -
• Dma Controller: -
• 10-bit Da Converter: -
• 10-bit Ad Converter: 12
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 10
• Motor / Igbt Control: -
• Real Time Clock: 1
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: -
• Remote Control Interface: -
• Hardware Cec Controller: -
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit
• Lead Free Status / Rohs Status: Details

10.4
Registers Description
10.4.6
31-8
7
6-5
4
3-1
0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
Bit
−
I2SC
FDPX[1:0]
TXE
SINT[2:0]
−
Note 1: Specify the all mode first and then enable the <TXE> bit.
Note 2: Do not stop the transmit operation (by setting <TXE> = "0")when data is being transmitted.
Bit Symbol
SCxMOD1 (Mode Control Register 1)
I2SC
31
23
15
0
0
0
7
0
-
-
-
R
R/W
R/W
R/W
R/W
R/W
Type
30
22
14
0
0
0
6
0
-
-
-
Read as 0.
IDLE
0: Stop
1: Operate
Specifies the IDLE mode operation.
Transfer mode setting
00: Transfer prohibited
01: Half duplex (Recieve)
10: Half duplex (Trasmitt)
11: Full duplex
Configures the transfer mode in the I/O interface mode. Also configures the FIFO if it is enabled.
In the UART mode, it is used only to specify the FIFO configuration.
Transmit control (Note)
0 :Disabled
1: Enabled
This bit enables transmission and is valid for all the transfer modes.
Interval time of continuous transmission (For I/O interface)
000: None
001: 1SCLK
010: 2SCLK
011: 4SCLK
100: 8SCLK
101: 16SCLK
110: 32SCLK
111: 64SCLK
This parameter is valid only for the I/O interface mode when SCLK pin output is selected. In other modes, this
function has no meaning.
Specifies the interval time of continuous transmission when double buffering or FIFO is enabled in the I/O
interface mode.
Write a "0".
FDPX
29
21
13
0
0
0
5
0
-
-
-
Page 218
TXE
28
20
12
0
0
0
4
0
-
-
-
27
19
11
Function
0
0
0
3
0
-
-
-
SINT
26
18
10
0
0
0
2
0
-
-
-
TMPM333FDFG/FYFG/FWFG
25
17
0
0
9
0
1
0
-
-
-
24
16
0
0
8
0
0
0
-
-
-
-