TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 69

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TMPM333FDFG

Manufacturer Part Number
TMPM333FDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM333FDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
512K
Rom Type
Flash
Ram (kbytes)
32K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM333FDFG
Manufacturer:
Toshiba
Quantity:
10 000
6.6.3
6.6.4
Table 6-5 Pin States in the STOP Mode
ο : Input or output enabled.
× : Input or output disabled.
Ports
Ports
Not
status in the STOP mode.
CGSTBYCR<STBY[2:0]>.
STOP mode
Low power Consumption Mode Setting
All the internal circuits including the internal oscillator are brought to a stop in the STOP mode.
By releasing the STOP mode, the device returns to the preceding mode of the STOP mode and starts operation.
The STOP mode enables to select the pin status by setting the CGSTBYCR<DRVE>.Table 6-5 shows the pin
X1, XT1
X2, XT2
RESET, NMI, MODE
PA0, PB0
[When used as a debug pin (PxFRn<PxmFn>=1) and
output is enabled (PxCR<PxmC>=1)] (Note)
PF7, PG3, PJ0, PJ1, PJ2, PJ3, PJ6, PJ7
[When used as an interrupt pin (PxFRn<PxmFn>=1)
and input is enabled (PxIE<PxmIE>=1)] (Note)
other port pins
The low power consumption mode is specified by the setting of the standby control register
Table 6-6 shows the mode setting in the <STBY[2:0]>.
Note:x: port number / m: corresponding bit / n: function register number
Note:Do not set any value other than those shown above in <STBY[2:0]>.
Note:When PA1 (pin number 56) is configured as a debug function pin, it prevents the low power con-
sumption mode from being fully effective. Configure PA1 to function as a general-purpose port
when the debug function is not used.
Pin Name
Table 6-6 Low power consumption mode setting
SLEEP
STOP
Mode
IDLE
Page 49
Output only
Input only
Input only
Output
Output
Output
Input
Input
Input
I/O
<STBY[2:0]>
CGSTBYCR
001
010
011
"High" level output.
<DRVE> = 0
×
×
×
×
×
ο
ο
Disabled when data is invalid.
Enabled when data is valid.
TMPM333FDFG/FYFG/FWFG
Depends on (PxCR[m])
Depends on (PxCR[m])
Depends on (PxIE[m])
Depends on (PxIE[m])
"High" level output.
<DRVE> = 1
×
ο
ο

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