TMPM333FDFG Toshiba, TMPM333FDFG Datasheet - Page 245

no-image

TMPM333FDFG

Manufacturer Part Number
TMPM333FDFG
Description
Microcontrollers (MCU) MCU w/ ARM Cortex-M3 512K FLASH, 32K SRAM
Manufacturer
Toshiba
Datasheets

Specifications of TMPM333FDFG

Processor Series
TX03
Core
ARM Cortex M3
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
512K
Rom Type
Flash
Ram (kbytes)
32K
Number Of Pins
100
Package
LQFP(14×14)
Vcc
3V
Cpu Mhz
40
Ssp (ch) Spi
-
I2c/sio (ch)
3
Uart/sio (ch)
3
Usb
-
Can
-
Ethernet
-
External Bus Interface
-
Cs/wait Controller (ch)
-
Dma Controller
-
10-bit Da Converter
-
10-bit Ad Converter
12
12-bit Ad Converter
-
16-bit Timer / Counter
10
Motor / Igbt Control
-
Real Time Clock
1
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
-
Remote Control Interface
-
Hardware Cec Controller
-
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM333FDFG
Manufacturer:
Toshiba
Quantity:
10 000
10.4.11
31-8
7
6
5-2
1-0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
Bit
TFCS
TFIS
TIL[1:0]
Note 1: To use TX/RX FIFO buffer, TX/RX FIFO must be cleared after setting the SIO transfer mode (half duplex/full
Note 2: After you perform the following operations, configure the SCxTFC register again.
Bit Symbol
SCxTFC (TX FIFO Configuration Register) (Note2)
TFCS
31
23
15
0
0
0
7
0
-
-
-
duplex) and enabling FIFO (SCxFCNF<CNFG> = "1").
SCxEN<SIOE> = "0" (SIO operation stop)
Conditions are as follows:SCxMOD1<I2SC> = "0" (operation is prohibited in IDLE mode) and releasing the
low power consumption mode which started by the WFI (Wait For Interrupt) instruction.
R
W
R/W
R
R/W
Type
TFIS
30
22
14
0
0
0
6
0
Read as 0.
TX FIFO clear (Note 1)
1: Clears TX FIFO.
Setting "1" clears TX FIFO and "0" is always read.
Selects interrupt generation condition.
0: An interrupt is generated when the data reaches to the specified fill level.
1: An interrupt is generated when the data reaches to the specified fill level or the data can not reach the specified
fill level at the time new data is read.
Read as 0.
Selects FIFO fill level.
-
-
-
00
01
10
11
Other than full
29
21
13
0
0
0
5
0
-
-
-
-
duplex
Empty
1 byte
2 byte
3 byte
Page 225
28
20
12
0
0
0
4
0
-
-
-
-
Full duplex
Empty
Empty
1 byte
1 byte
27
19
11
Function
0
0
0
3
0
-
-
-
-
26
18
10
0
0
0
2
0
-
-
-
-
TMPM333FDFG/FYFG/FWFG
25
17
0
0
9
0
1
0
-
-
-
TIL
24
16
0
0
8
0
0
0
-
-
-

Related parts for TMPM333FDFG