LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 493
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2-20E-5FN256I
Manufacturer Part Number
LFE2-20E-5FN256I
Description
IC FPGA 21KLUTS 193I/O 256FPBGA
Manufacturer
Lattice
Series
ECP2r
Datasheets
1.LFE2-12SE-6FN256C.pdf
(389 pages)
2.LFE3-35EA-8FN672I.pdf
(21 pages)
3.LFE2-20E-5FN256I.pdf
(4 pages)
4.LFE2-20E-5FN256I.pdf
(769 pages)
Specifications of LFE2-20E-5FN256I
Number Of Logic Elements/cells
21000
Number Of Labs/clbs
2625
Total Ram Bits
282624
Number Of I /o
193
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
256-BGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1170
LFE2-20E-5FN256I
Q6411457
LFE2-20E-5FN256I
Q6411457
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-20E-5FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- LFE2-12SE-6FN256C PDF datasheet
- LFE3-35EA-8FN672I PDF datasheet #2
- LFE2-20E-5FN256I PDF datasheet #3
- LFE2-20E-5FN256I PDF datasheet #4
- Current page: 493 of 769
- Download datasheet (18Mb)
Lattice Semiconductor
Appendix C. Attribute Cross-Reference Table
Table 8-99. Attribute Cross-Reference Table
PROTOCOL
CH[0,1,2,3]_MODE
DATARANGE
(ECP2M35 ES Device)
DATARANGE
(All other Devices)
CH[0,1,2,3]_REFCK_MULT [BUS8BIT_SEL,
CH[0,1,2,3]_DATA_WIDTH [TXCLKF, TXCLKH,
PLL_SRC
CH[0,1,2,3]_CDR_SRC
Attribute Name
Independent
[QAUD_MODE,
CHn_RX_DET,
CHn_OOB_EN,
CHn_GE_AN_EN]
[CHn_TXPWDNB,
CHn_RXPWDNB]
[PLL_DIV, CHn_CDR_DIV] LOW
REFCK25X,
REFCK_MODE,
CHn_RATE_MODE_RX,
CHn_RATE_MODE_TX]
CHn_RXCLKF,
CHn_RXCLKH,
CHn_TX_GEAR,
CHn_RX_GEAR,
CHn_BUS_WIDTH8]
Attribute Names
Dependent
8-88
GIGE
PCIE
G8B10B : [00001,00,0,0]
10BSER : [00001,00,0,0]
8BSER
SDSDI
HDSDI
SINGLE : [11]
GROUP1 : [11]
GROUP2 : [11]
DISABLE: [00]
MEDLOW
MED
MEDHIGH : [010,000]
HIGH
LOW
MEDLOW
MED
MEDHIGH : [000,000]
HIGH
8X
8XH
10X
10XH
16X
16XH
20X
20XH
25X
25XH
8,BYPASS
8, NORMAL; 10, BYPASS;
10, NORMAL
16,BYPASS
16,NORMAL;20,BYPASS;20,NORMAL
REFCLK
CORE_TXREFCLK :[1]
REFCLK
CORE_RXREFCLK :[01]
LatticeECP2M SERDES/PCS Usage Guide
:[0,1,0000,0000,0,0,1]
:[0,1,0000.0000,0,0,0]
:[01,1111,1111,1,1,1]
:[0,1,1111,1111,1,1,0]
: [1,0,1,0,0]
: [1,0,1,1,1]
: [0,0,1,0,0]
: [0,0,1,1,1]
: [1,0,0,0,0]
: [1,0,0,1,1]
: [0,0,0,0,0]
: [0,0,0,1,1]
: [0,1,0,0,0]
: [0,1,0,1,1]
: [00000,00,0,1]
: [00100,00.0,0]
: [00001,00,0,0]
:[00001,00,1,0]
:[00001,00,0,0]
: [101,101]
: [100,100]
: [010,010]
: [000,000]
: [101,101]
: [100,100]
: [010,010]
: [000,000]
Attribute
Value
:[0]
:[00]
{QD_00[4:0],
{CH_0A[0],
{QD_14[2:0],
{QD_12[6],
{QD_1B[7],
{QD_11[5]}
{CH_0B[3:2]}
CH_01[5:4],
CH_0B[4],
CH_00[4]}
CH_0B[0]}
CH_07[2:0]}
QD_12[7],
QD_13[6],
CH_0B[1],
CH_0A[1]}
QD_1B[6],
QD_1A[7:4],
QD_1A[3:0],
CH_01[2],
CH_01[3],
CH_02[7]}
Register
Map
3
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