LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 716

• Manufacturer Part Number: LFE2-20E-5FN256I
• Description: IC FPGA 21KLUTS 193I/O 256FPBGA
• Manufacturer: Lattice
• Series: ECP2r

Specifications of LFE2-20E-5FN256I

• Number Of Logic Elements/cells: 21000
• Number Of Labs/clbs: 2625
• Total Ram Bits: 282624
• Number Of I /o: 193
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-BGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1170; LFE2-20E-5FN256I; Q6411457

Lattice Semiconductor
LatticeECP2/M sysCONFIG Usage Guide
Configuration time is computed by dividing the maximum number of configuration bits, as given in Table 15-4
above, by the Master Clock frequency.
Security Bit
Setting the CONFIG_SECURE option to ON prevents readback of the SRAM from JTAG or the sysCONFIG pins.
When CONFIG_SECURE is set to ON the only operations available are erase and write. The security fuse is
updated as the last operation of SRAM configuration. If a secured device is read it will output all zeros.
For LatticeECP2/M devices the CONFIG_SECURE option is accessed via the Design Planner in ispLEVER. To set
this option in Diamond, see Appendix A. The default is OFF.
For the LatticeECP2/M S-Series devices (part numbers ECP2-XXES and ECP2MXXES) the CONFIG_SECURE
option is accessed using the Security Setting option under the Tools menu.
Compress Bitstream
Setting the global COMPRESS_CONFIG option to ON in ispLEVER Design Planner will cause the software to gen-
erate a compressed bitstream. To set this option in Diamond, see Appendix A. The LatticeECP2/M will automati-
cally decompress the bitstream as it comes into the device. The actual amount of compression varies according to
the data pattern in the uncompressed bitstream. Though unlikely, it is theoretically possible for the compressed bit-
stream to be larger than the uncompressed bitstream.
Compressing the bitstream can result in faster configuration. The default setting is OFF.
Persistent Option
The PERSISTENT Option is set using ispLEVER Design Planner (default is OFF). To set this option in Diamond,
see Appendix A. PERSISTENT serves two purposes.
Setting PERSISTENT ON tells the place and route tools that it may not use any of the sysCONFIG pins associated
with the parallel port (all of the dual-purpose pins except DI) or the SPI Port pins.
Setting PERSISTENT ON also sets a hardware fuse. So, not only are the pins reserved in software, they are also
reserved in hardware.
PERSISTENT is set to ON when the user wants to be able to read the SRAM configuration memory using the
Slave Parallel port. In order to perform a read using the parallel port the user must first send a read command, set-
ting PERSISTENT ON allows the parallel port to listen for this command while in user mode (the DONE pin is
high). If the design does not require this function, the PERSISTENT option should be set to OFF.
The PERSISTENT preference must also be set to ON if the SPI memory needs to be accessed using the SPI port
while the part is in user mode (the DONE pin is high) to preserve the SPI port pins.
Configuration Mode
Just as the CFG pins tell the hardware which port to configure from; the CONFIG_MODE option tells the software
which port will be used. CONFIG_MODE allows the user to protect dual-purpose sysCONFIG pins. For example
setting CONFIG_MODE to SPI will keep the Place and Route tools from using the SPI pins as general purpose I/O.
The user, however, is still free to assign these pins as GPIO, but a warning will be generated as a reminder that
there are certain precautions (see the section above entitled Configuration Pins).
Available options are NONE, JTAG, SPI, SPIm, Slave Serial, and Slave Parallel. The default is Slave Serial.
DONE_OD, DONE_EX
During configuration the DONE pin is low. Once configuration is complete, indicated by the setting of the internal
Done bit, the device wake-up sequence takes place and then the DONE pin goes high. Under most circumstances,
this flow is exactly what is needed, however, if there are several devices in one configuration chain, delay of the
wake-up sequence may be desirable in order to “synchronize” the wake-up of all devices in the chain. There are
two options that allow for this synchronization. These options are set in ispLEVER Design Planner. To set these
options in Diamond, see Appendix A.
15-20